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Applications : Cadence SPB OrCAD v16.60.017 Hotfix
Cadence SPB OrCAD v16.60.017 Hotfix :22,November,2013

Cadence SPB OrCAD v16.60.017 Hotfix | 874MB

Cadence Design Systems, Inc. announce hotfix version 017 for 16.60 release. This update includes some critical bug fixes.[cut]

735992 ADW LIBFLOW Create Test Schematic does not use the correct package type
1121403 FSP PROCESS Assign to Pin not getting obeyed by Synthesis.
1141844 RFPCB DISCRETELIBX2A ADS Lib Translation Pin Soldermask/Pastemask missing
1169269 ALLEGROEDITOR DRAFTING Dimension placed on package symbol moves to different place when it is placed on brd file.
1170488 ALLEGROEDITOR MANUFACT Dimension text(on .psm) move to different position, when it is placed on .brd.
1173345 CIS CRYSTALREPORTS Crystal Report - Display Parameter dialog for export option
1181759 SCM LVS SCM Crash when doing update all that executing import physical command.
1182499 ALLEGROEDITOR OTHER Step export to include through hole padstacks (all pins and via) drill.
1184682 CONCEPTHDL CONSTRAINTMGR Net Constraint not transferring to layout from schematic
1185524 F2B PACKAGERXL Enhancement User would like notification of packshort in pxl.log
1185902 ALLEGROEDITOR SHAPE Update shapes dont clear some diffpairs in HF15
1186152 ADW LRM Part Status for Deleted Part in LRM is distinguished with other part status
1186387 ALLEGROEDITOR OTHER DXF cannot catch offset value in s047 hotfix.
1186805 ALLEGROEDITOR OTHER Exported STEP file missing multiple components placed on board
1186818 ALLEGROEDITOR COLOR Custom color not retained during dehilight
1187196 CONCEPTHDL CORE TOC not populating (page 1)
1187667 F2B PACKAGERXL Existing hard LOCATION property in drawing was left unchanged
1188264 ALLEGROEDITOR MODULES Some fillets not regenerated in module created from a board file.
1190144 ALLEGROEDITOR OTHER Fillet shape is not genrated around cline
1190210 F2B BOM The bomhdl.exe fails - MFC Application has Stopped Working
1190618 ALLEGROEDITOR GRAPHICS Enhancement for Visible grid
1190813 ALLEGROEDITOR INTERFACES 3rd party netlist file in TEL format fails syntax check but imports successfully
1190895 ALLEGROEDITOR EDITETCH Route delay meter displays violation when sliding diff pair
1190908 F2B OTHER DE-HDL aborts if dummy net is being cross-probed from PCB Editor
1190990 CONCEPTHDL CORE Mismatch in .csa and .csb files
1191008 CONCEPTHDL CORE Remove Binary File feature doesn't work
1191514 SCM PACKAGER Packaging error PKG-100
1191517 ALLEGROEDITOR DRAFTING Metric +tolerance when using dual dimensions is not displayed correctly
1192561 ALLEGROEDITOR GRAPHICS Padstack with offset is not showing correctly in the 3D Viewer.
1192916 ALLEGROEDITOR EDITETCH Wrong static phase values are shown in the dynamic timing meter for certain Diff pairs compared to CM.
1194197 ALLEGROEDITOR OTHER Step export to include through hole padstacks.
1194239 PSPICE DEHDL Associate Model does not launch from DE-HDL
1194736 PSPICE SIMULATOR Design causes RPC failure when run consectively
1195139 ALLEGROEDITOR PLACEMENT Components disappears from board file once they moved
About Cadence Design Systems, Inc.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
Name: Cadence SPB OrCAD
Version: (32bit) 16.60.017 Hotfix
Interface: english
OS: Wind0ws XP / Vista / Seven
System Requirements: Cadence SPB OrCAD 16.60.000 - 16.60.016
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